Existing wireless system architectural configurations impose stringent constraints on the system designer with regards to receiving communication signals. Moreover, such configurations often provide low reliability communication links, high operating costs, and an undesirably low level of integration with other system components.
As shown in FIG. 1, a conventional radio frequency (RF) receiver 100 includes an analog radio receiver 105, at least one analog to digital converter (ADC) 110, a controller 115 and a modem 120. The analog radio receiver 105 is a direct conversion receiver which includes an antenna 125 for receiving a wireless communication signal, a bandpass filter 130, a low noise amplifier (LNA) 135, an optional second filter 140 (e.g., bandpass filter), a demodulator 145 having two outputs 150, 155, a phase-locked loop (PLL) 160, an analog real signal path low pass filter (LPF) 165A, an analog imaginary signal path LPF 165B, first stage real signal path amplifier 170A, first stage imaginary signal path amplifier 170B, first stage analog real signal path high pass filter (HPF) 175A, first stage analog imaginary signal path HPF 175B, second stage real signal path amplifier 180A, second stage imaginary signal path amplifier 180B, second stage analog real signal path HPF 185A, and second stage analog imaginary signal path HPF 185B. Each of the amplifiers 170A, 170B, 180A, 180B, include of a high gain stage residing in the analog domain of the RF receiver 100.
The modem 120 controls the switching of the LNA 135. The PLL 160 generates a local oscillator (LO) signal to control the two outputs 150, 155 of the demodulator 145. The output 150 is an in-phase (I) output of the demodulator 145 for outputting a real signal component of the wireless communication signal. The output 155 is a quadrature (Q) output of the demodulator 145 for outputting an imaginary signal component of the wireless communication signal. The analog LPFs 165A, 165B, control the bandwidth selectivity of the I and Q outputs 150 and 155, respectively. The outputs of the analog LPFs 165A, 165B, are then amplified by the first and second stage amplifiers 170A, 170B, 180A, 180B, respectively.
Due to high gain requirements, the first and second stage analog HPFs 175A, 175B, 185A, 185B, are included in the analog radio receiver 105 to provide capacitance after each of the first and second amplifier stages 170A, 170B, 180A, 180B, respectively, whereby the first and second gain stages are AC-coupled and any residual direct current (DC) is removed to prevent DC offset. Each of the analog HPFs 175A, 175B, 185A, 185B, has a signal input, a signal output, at least one capacitor (C) which connects the signal input to the signal output, and at least one resistor (R) which connects the output of the capacitor to ground, thus forming an R-C filter. The analog HPFs 175A, 175B, 185A, 185B, alter the spectral shape (i.e., reducing the energy) of the lower portion (e.g., below 50 kHz) of the frequency domain response associated with the real and imaginary signal components.
In the conventional RF receiver 100 of FIG. 1, the ADC 110 is connected to the output of the second stage analog HPFs 185A, 185B. The ADC 110 outputs digital I and Q outputs 190, 195. The controller 115 maintains control over all of the active components of analog radio receiver 105 and the ADC 110.
In the analog radio receiver 105, the analog HPFs 175A, 175B, 185A, 185B, are utilized to guarantee the spectral shape of the wireless communication signal received via the antenna 125 before being sampled at the ADC 110. Typically, the specifications on the analog HPFs 175A, 175B, 185A, 185B, are very stringent such that the implementation requires high order filtering. Specifically, one such specification is error vector magnitude (EVM), which is a normalized mean squared error (MSE) measurement. Implementing high order filter designs for the analog HPFs 175A, 175B, 185A, 185B, may be complicated and expensive. Thus, the tolerances on parts for the analog HPFs 175A, 175B, 185A, 185B, may lead to unacceptable production yield. Reducing the design complexity of the analog HPFs 175A, 175B, 185A, 185B, may be accomplished with a lower order filter design with less stringent specifications. However, using such a filter design in the analog HPFs 175A, 175B, 185A, 185B, will result in the occurrence of a group delay variation distortion if no compensation is introduced after the analog HPFs 175A, 175B, 185A, 185B, thus degrading the performance of the RF receiver 100.
Because the costs of HPFs that process RF analog signals are higher than the components that use DSP, it is desired to provide a digital baseband (DBB) system, including a low cost receiver with low noise and minimal power requirements, which utilizes DSP techniques to compensate for group delay variation distortion caused by analog HPFs.